Currently, a method for forming a semiconductor device comprises the following steps. Firstly, as illustrated in FIGS. 1 and 2, an active region 20 and an isolation region 12 surrounding the active region 20 are formed on a semiconductor substrate 10. Next, as illustrated in FIGS. 3 and 4, a gate stack structure is formed on the active region 20 and extends to the isolation region 12 (the gate stack structure comprises a gate dielectric layer 22, a gate 24 formed on the gate dielectric layer 22, and sidewalls 26 surrounding the gate dielectric layer 22 and the gate 24. In practice, a cap layer is further formed on the gate for preventing the gate from being damaged during the operation. The cap layer is usually made of silicon nitride. The cap layer is not indicated in the text and drawings of this specification for the convenience of description). Next, as illustrated in FIGS. 5 and 6, the gate stack structure and the isolation region 12 are used as a mask, and the semiconductor substrate 10 of a partial thickness in the active region 20 is removed to form a groove 30. Finally, a semiconductor material is produced in the groove 30 for filling into the groove 30 so as to form a source/drain (S/D) region.
However, as illustrated in FIGS. 7 to 9, it is found in practice that a slot 34 is defined at an interface between the S/D region 32 and the isolation region 12. Consequently, as illustrated in FIGS. 10 to 12, when a contact region 36 (e.g., metal silicide layer) is formed subsequently on the S/D region 32, the contact region 36 may likely reach a junction region via the slot 34, thereby causing a leakage current.